One popular multiprocessor computer architecture is formed by coupling one or more processors to a shared main memory storing data, with each processor typically having a local cache to store its own private copy of a subset of the data from the main memory.
In the above architecture, a separate memory control chip connecting the processors to the main memory manages the operations necessary to access memory from any one of the processor caches and the main memory. It is typically the responsibility of the memory control chip to maintain a coherent view of the memory by checking an address reference generated by a processor. To perform this function, the memory control chip issues a probe reference to the other processor caches to see if a copy of the data exists in any of these other caches.
Each processor of the multiprocessor system must be able to service probe references to its cache as well as its own internally generated references to the cache. From the processor's point of view, these probe references consume cache bandwidth which could have been used for the processor's internal references. The impact of this degradation of bandwidth may affect the performance of the system.
In the prior art, one solution to minimize the impact of this degradation has been to maintain an external duplicate copy of the tags of the processor cache. This way, the probe request can reference the address of the tags to determine whether a probe response is a hit or a miss. Only if the probe response results in a cache hit, is the probe response sent to the data memory portion of the cache to access the data. Since probe responses typically result in cache misses, the external tags improve the performance of the system.
However, a multiprocessor system with duplicate external tags has some disadvantages. The system must provide the external tags for each processor along with the associated additional logic. In addition, since the external tags must maintain coherence with the processor's cache, logic must be provided which updates the state of the external tags to reflect any changes to the cache. This additional computation and bandwidth requirement leads to degradation in system performance.
Therefore, a technique is desired which resolves probe references in multiprocessor systems without using external duplicate tags.